HBM memory
High-bandwidth memory is stacked DRAM packaged close to accelerators so GPUs can feed models fast enough. It is one of the most visible AI hardware bottlenecks because capacity, yield, and advanced packaging all have to scale together.
This segment sits inside the physical and semiconductor supply chain that supports AI training and inference. The important question is not only whether AI demand grows, but where scarcity shows up: chips, memory, networking, power, sites, or specialized services.
For 13F analysis, the tag is meant to separate the specific bottleneck a company is exposed to from the broad AI label. That helps distinguish a direct accelerator supplier from a power-equipment company, a data center landlord, or a miner with a power portfolio that could be repurposed for HPC.
- DRAM/HBM manufacturers
- Advanced packaging and substrate suppliers
- Memory controllers and platform qualification
- Equipment and materials used in memory production
- HBM capacity additions
- Pricing and contract duration
- Yield on newer HBM generations
- Customer qualification with Nvidia, AMD, and hyperscaler ASIC programs
Situational Awareness LP
Leopold Aschenbrenner · Q4 2025 filed 2026-02-11
High-bandwidth memory (HBM) chips and the DRAM makers producing them — a known supply bottleneck for AI accelerators.
| Ticker | Name | Value | Instrument |
|---|
| Ticker | Action | Value |
|---|---|---|
| MU | Closed | -$50M |